With the advance in digital signal processing and wireless communication technologies, software defined radio (SDR) has become a reality. For SDR with multi-protocol and/or multiband capabilities, sample rate conversion (SRC) is an important element in the digital signal processing architecture of the SDR. Using SRC, digitally modulated discrete-time signals at different sample rates specific to different protocols and/or frequency bands are up-sampled into discrete-time signals with a common sample rate, which are then converted into an analog signal by a digital-to-analog (D/A) converter at the common sample rate. At the receiver, the received signal is digitised by an analog-to-digital (A/D) converter at the common sample rate and, again using SRC, variously down-sampled into streams of discrete-time signals at different sample rates specific to different protocols and/or frequency bands. Different sample rates may even be used in a single communication protocol, such as the IEEE 802.11g wireless local area network (WLAN) specification.
Using a fixed sample rate for D/A and A/D converters in an SDR-type multiband or multi-protocol communication system has a number of advantages. For example, it preserves the modularity of the system, reduces the system complexity, and provides better reconfigurability. Also, the D/A or A/D converter with a fixed sample rate has much lower jitter than a D/A or A/D converter with an adjustable sample rate. If the D/A or A/D converter operates with a fixed clock, the clock-jitter performance can be significantly improved and system integration can be greatly simplified.
In a digital communication system, the D/A or A/D sample rate is usually four to eight times the data symbol rate. If a band-pass signal is to be generated or received in the digital domain, such as in a multiband system, the sample rate will be significantly higher than that multiple. When the desired sample rate is an integer multiple of the symbol rate, the up-sampling or down-sampling process is straightforward. However, there are many applications where the ratio by which the discrete-time signal must be up-sampled or down-sampled is not an integer. Hence, the SRC method used should be able to accommodate an arbitrary non-integer conversion ratio.
SRC is theoretically a process of continuous-time signal reconstruction, or interpolation, followed by re-sampling at the desired sample rate. The interpolation is ideally realized by a Nyquist low-pass filter, which converts the discrete-time signal to a continuous-time signal without distortion. Since the ideal Nyquist filter is neither possible nor necessary in practice, how to select and implement an appropriate interpolation filter is the key issue for efficient SRC.
Various SRC structures have been proposed. The most popular and computationally efficient approach for SRC is to use the cascaded integrator-comb (CIC) filter due to its simple implementation (no multiplication is required). However, there are a few drawbacks with the CIC filter. First, it has a very wide transition band, and introduces attenuation in the passband of interest. An additional decimating low-pass filter is usually required to compensate for the passband droop. Second, it works only when the conversion ratio is rational-valued. Third, for some conversion ratios, CIC filtering has to be performed at a very high intermediate sample rate. To avoid the second stage decimating filter, different sharpened CIC filters have been proposed. However, the wide transition band and the limitation to rational-valued conversion ratios remain the same. A method for irrational conversion ratio SRC has been proposed based on the use of parallel CIC filters and linear interpolation, but the passband droop is even worse.
Different types of piecewise polynomial interpolation can be used for arbitrary ratio SRC, but the computational cost is very high. For example, the polynomial coefficient calculation requires multiplications in the order of P2 to P3, where P is the order of the polynomial, and the interpolation calculation requires additional multiplications in the order of P to P2. The Farrow structure which consists of a filter bank and a fractional delay multiplication block is widely used for efficient implementation of piecewise polynomial interpolation, but the required number of multiplications is still P2+P.
A B-spline is a piecewise continuous function which is constructed through repeated convolution of a basis function with itself. B-splines are suitable for interpolation due to their high degree of smoothness. A P-th order B-spline is of regularity P−1, meaning that it is continuously differentiable P−1 times. A centred B-spline can be efficiently implemented using the Farrow structure. However, since the frequency response of a B-spline is a power of the sinc function, the passband droop is still significant. Time-domain pre-filtering is normally implemented in B-spline interpolation for passband droop compensation, which considerably increases the interpolation complexity.
A typical digital communication system uses a transmitter filter (or pulse shaping filter) to limit the bandwidth of the transmitted signal. A receiver filter, which is usually a matched-filter having the same magnitude response as that of the transmitter filter, sometimes combined with an equalizer, is used in the receiver to achieve high signal-to-noise ratio and low inter-symbol interference. These filters are typically implemented digitally in the time domain for an SDR. Thus, combining the transmitter filter or the receiver filter with the SRC seems to be an attractive solution to relax the constraints on the SRC interpolation filter and to achieve overall complexity reduction. Using this approach, an SRC structure which includes a pulse shaping filter to compensate for the passband droop has been proposed. Unfortunately, since the CIC filter is still used for SRC, the application of this method is limited to rational conversion ratio SRC. Moreover, the pulse shaping filter design is complicated as it resorts to linear programming. An arbitrary ratio SRC structure using B-splines has been proposed, which combines the interpolation filter with the transmitter/receiver filter and compensates for the passband droop by digital filtering operating in the discrete-time domain at an up-sampled intermediate sample rate. However, the required discrete-time-domain digital filtering still contributes significantly to the complexity of the SRC processing.